We have a requirement for an FPGA design engineer in the power converters and motors group. Reporting to the Engineering Manager, you will join their dedicated project team which is challenged with the task of delivering robust and cost effective designs for real time power and motor control applications.
Specific responsibilities for the FPGA Design Engineer role will depend upon your skill set and level of seniority. Typically, you will be responsible for a wide range of FPGA activities covering all stages of the development life-cycle; from requirements through to verification and validation of programmed devices. You will work within a dedicated team environment where co-operation, innovation and thoroughness are essential to develop FPGAs that successfully meet project objectives.
Key responsibilities required for this role will include:
- FPGA Implementation including requirements capture, VHDLRTL coding and physical stages
- Writing and execution of VHDLtestbench code and other IV&V activities
- Safety related design process development and maintenance
- Model Based design techniques using Matlab/Simulinkmodeling and simulation
- Requirements tracking, configuration control, incident reporting and project documentation
- Lab support during hardware development stages
- Inter-team and intra-team communications, including reviewing
- Degree or higher in electrical/electronic engineering or equivalent
- Proven track record of FPGA/ASIC design
- Comprehensive knowledge of VHDL with practical experience in successful projects
- Experience of model based design using tools such as Matlab/Simulink is preferable
- Capability of working to formal FPGA/ASIC design processes is essential
- Broad knowledge of digital electronics and other areas of engineering. (e.g. systems, analogue/power electronics, mechanical, motors, etc.)
- Good knowledge of best practice design life-cycle process; gated design phases, design reviews
- Good in front of customers; willing and able to make presentations
- Eligible for security clearance to SC level
This is a full-time role (37.5 hours per week) but flexible working or a 4 day week would be considered. PMES will consider full time, part time and flexible working for all Engineering roles.
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